Product Summary
The MB91101APFV-G-BNDE1 is a standard single-chip microcontroller constructed around the 32-bit RISC CPU (FR* family) core with abundant I/O resources and bus control functions optimized for high-performance/high-speed CPU processing for embedded controller applications. To support the vast memory space accessed by the 32-bit CPU, the MB91101APFV-G-BNDE1 normally operates in the external bus access mode and executes instructions on the internal 1 Kbyte cache memory and 2 Kbytes RAM for enhanced performance.
Parametrics
MB91101APFV-G-BNDE1 absolute maximum ratings: (1)Analog supply voltage: VSS – 0.3 to VSS + 3.6 V; (2)Analog reference voltage: VSS – 0.3 to VSS + 3.6 V; (3)Analog pin input voltage: VSS – 0.3 to AVCC + 0.3 V; (4)Input voltage: VSS – 0.3 to VCC5 + 0.3 V; (5)Output voltage: VSS – 0.3 to VCC5 + 0.3 V; (6)"L" level maximum output current: 10 mA; (7)"L" level average output current: 4 mA; (8)"L" level maximum total output current: 100 mA; (9)"L" level average total output current: 50 mA; (10)"L" level maximum output current: –10 mA; (11)"H" level average output current: –4 mA; (12)"H" level maximum total output current: –50 mA; (13)"H" level average total output current: –20 mA; (14)Power consumption: 500 mW; (15)Operating temperature: –40 to +70 ℃; (16)Storage temperature: –55 to +150 ℃.
Features
MB91101APFV-G-BNDE1 features: (1)32-bit RISC, load/store architecture, 5-stage pipeline; (2)Operating clock frequency: Internal 50 MHz/external 25 MHz (PLL used at source oscillation 12.5 MHz); (3)General purpose registers: 32 bits×16; (4)16-bit fixed length instructions (basic instructions), 1 instruction/1 cycle; (5)Memory to memory transfer, bit processing, barrel shifter processing: Optimized for embedded applications; (6)Function entrance/exit instructions, multiple load/store instructions of register contents, instruction systems supporting high level languages.
Diagrams
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