(China (Mainland))
Product Summary
The MC14035BCP 4-bit shift register is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. It consists of a 4-stage clocked serial–shift register with synchronous parallel inputs and buffered parallel outputs. The Parallel/Serial (P/S) input of MC14035BCP allows serial–right shifting of data or synchronous parallel loading via inputs DP0 thru DP3. The True/Complement (T/C) input of MC14035BCP determines whether the outputs display the Q or Q outputs of the flip–flop stages. J–K logic forms the serial input to the first stage. With the J and K inputs connected together they operate as a serial "D" input.
Parametrics
MC14035BCP absolute maximum ratings: (1)DC Supply Voltage: -0.5 to + 18.0 V; (2)Input or Output Voltage (DC or Transient): -0.5 to VDD + 0.5 V; (3)Input or Output Current (DC or Transient), per Pin: ±10 mA; (4)Power Dissipation, per Package: 500 mW; (5)Storage Temperature: -65 to + 150 ℃; (6)Lead Temperature (8-second Soldering): 260 ℃.
Features
MC14035BCP features: (1)4-stage Clocked Serial-shift Operation; (2)Synchronous Parallel Loading of all Four Stages; (3)J-K Serial Inputs on First Stage; (4)Asynchronous True/Complement Control of all Outputs; (5)Fully Static Operation; (6)Asynchronous Master Reset; (7)Data Transfer Occurs on the Positive-going Clock Transition; (8)No Limit on Clock Rise and Fall Times; (9)All Inputs are Buffered; (10)Supply Voltage Range = 3.0 Vdc to 18 Vdc; (11)Capable of Driving Two Low-power TTL Loads or One Low-power; (12)Schottky TTL Load Over the Rated Temperature Range.
Diagrams
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Gates (AND / NAND / OR / NOR) 3-18V Quad 2-Input NOR |
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MC14001BDR2 |
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