Product Summary

The BS616LV4017EIP-70 is a high performance, very low power CMOS Static Random Access Memory organized as 262,144 words by 16 bits and operates from a wide range of 2.4V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.45uA at 3.0V/25oC and maximum access time of 55ns at 3.0V/85oC. Easy memory expansion is provided by an active LOW chip enable (CE),active LOW output enable(OE) and three-state output drivers. The BS616LV4017EIP-70 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV4017EIP-70 is available in DICE form, JEDEC standard 44-pin TSOP Type II package and 48-ball BGA package.

Parametrics

BS616LV4017EIP-70 absolute maximum ratings: (1)Terminal Voltage with Respect to GND: -0.5 to Vcc+0.5 V; (2)Temperature Under Bias: -40 to +85 ℃; (3)Storage Temperature: -60 to +150 ℃; (4)Power Dissipation: 1.0 W; (5)DC Output Current: 20 mA.

Features

BS616LV4017EIP-70 features: (1)Wide Vcc operation voltage : 2.4~5.5V; (2)High speed access time: -55 55ns, -70 70ns; (3)Automatic power down when chip is deselected; (4)Three state outputs and TTL compatible; (5)Fully static operation.

Diagrams

BS616LV4017EIP-70 block diagram

BS61
BS61
Hammond Manufacturing
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Data Sheet
0-1: $0.40
1-25: $0.36
25-50: $0.33
50-100: $0.31
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